2309A-1HDCG OverviewClock generator is packaged in the way of Tube. Clock PLL is embedded in the 16-SOIC (0.154, 3.90mm Width) package. LVTTL is designed for clock generator's input. 1 circuits are used to achieve clock PLL's superior flexibility. 133MHz is the maximal value for normal operation. PLL clock is mounted in the way of Surface Mount. Clock generators should operate with the voltage supply of 3V~3.6V. The temperature should be set at 0°C~70°C to ensure reliable performance. LVTTL is designed for clock generator's output. This electronic component can be classified into Zero Delay Buffer. According to the base part number, its related parts can be founded.
2309A-1HDCG FeaturesAvailable in the 16-SOIC (0.154, 3.90mm Width)
2309A-1HDCG ApplicationsThere are a lot of Renesas Electronics America Inc.
2309A-1HDCG Clock Generators applications.
Wireless infrastructure
Instrument
Automatic test equipment
Wide area power system
Digital circuits
Wireless base station for LTE, LTE-advanced
Picocells, femtocells and small cells
Sampling clocks for ADC and DAC
1 Gigabit Ethernet
10 Gigabit Ethernet
| Factory Lead Time | 13 Weeks |
| Mounting Type | Surface Mount |
| Package / Case | 16-SOIC (0.154, 3.90mm Width) |
| Supplier Device Package | 16-SOIC |
| Operating Temperature | 0°C~70°C |
| Packaging | Tube |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Type | Zero Delay Buffer |
| Voltage - Supply | 3V~3.6V |
| Base Part Number | IDT2309-1 |
| Output | LVTTL |
| Number of Circuits | 1 |
| Frequency (Max) | 133MHz |
| Input | LVTTL |
| Ratio - Input:Output | 1:9 |
| PLL | Yes with Bypass |
| Differential - Input:Output | No/No |
| Divider/Multiplier | No/No |
| RoHS Status | ROHS3 Compliant |