ISPPAC-CLK5620V-01T100I Overview
Clock generator is packaged in the way of Tray. Clock PLL is embedded in the 100-LQFP package. The peak reflow temperature (Cel) amounts to 240 to be essentially indestructible. 100 terminations can be found in frequency generators. The supply voltage of 3.3V allows for high efficiency. HSTL, LVCMOS, LVDS, LVPECL, LVTTL, SSTL is designed for clock generator's input. 1 circuits are used to achieve clock PLL's superior flexibility. 320MHz is the maximal value for normal operation. PLL clock is mounted in the way of Surface Mount. The maximal supply voltage (Vsup) reaches 3.6V. The supply voltage (Vsup) should be kept above 3V for normal operation. Clock generators should operate with the voltage supply of 3V~3.6V. The temperature should be set at -40°C~85°C to ensure reliable performance. HSTL, LVCMOS, LVDS, LVPECL, LVTTL, SSTL is designed for clock generator's output. Clock PLL is equipped with 100 pin count. According to the base part number, its related parts can be founded. Clock generator is designed with 100 pins. The supply voltage should be maintained at 3.3V for high efficiency. This clock generator is a member of ispClock™ series. Clock PLL is configured with 20 output. The maximal same edge skew (tskwd) can not be exceeded. This clock generator belongs to the family of 5600. The logic IC PLL clock adopts is PLL BASED CLOCK DRIVER.
ISPPAC-CLK5620V-01T100I Features
Available in the 100-LQFP
Supply voltage of 3.3V
Operating supply voltage of 3.3V

ISPPAC-CLK5620V-01T100I Applications
There are a lot of Lattice Semiconductor Corporation
ISPPAC-CLK5620V-01T100I Clock Generators applications.

Wireless infrastructure
Instrument
Automatic test equipment
Wide area power system
Digital circuits
Wireless base station for LTE, LTE-advanced
Picocells, femtocells and small cells
Sampling clocks for ADC and DAC
1 Gigabit Ethernet
10 Gigabit Ethernet

Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	100-LQFP
Number of Pins	100
Operating Temperature	-40°C~85°C
Packaging	Tray
Series	ispClock™
Published	2000
JESD-609 Code	e0
Pbfree Code	no
Part Status	Obsolete
Moisture Sensitivity Level (MSL)	3 (168 Hours)
Number of Terminations	100
ECCN Code	EAR99
Terminal Finish	Tin/Lead (Sn/Pb)
Voltage - Supply	3V~3.6V
Terminal Position	QUAD
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	240
Number of Functions	1
Supply Voltage	3.3V
Terminal Pitch	0.5mm
Time@Peak Reflow Temperature-Max (s)	30
Base Part Number	ISPPAC-CLK5620
Output	HSTL, LVCMOS, LVDS, LVPECL, LVTTL, SSTL
Pin Count	100
Number of Outputs	20
Operating Supply Voltage	3.3V
Supply Voltage-Max (Vsup)	3.6V
Supply Voltage-Min (Vsup)	3V
Number of Circuits	1
Nominal Supply Current	160mA
Frequency (Max)	320MHz
Family	5600
Input	HSTL, LVCMOS, LVDS, LVPECL, LVTTL, SSTL
Ratio - Input:Output	2:20
Logic IC Type	PLL BASED CLOCK DRIVER
PLL	Yes with Bypass
Differential - Input:Output	Yes/Yes
Divider/Multiplier	Yes/No
Same Edge Skew-Max (tskwd)	0.05 ns
Duty Cycle	50 %
Radiation Hardening	No
RoHS Status	Non-RoHS Compliant