SI5341D-B-GMR Overview
Clock generator is packaged in the way of Tape & Reel (TR). Clock PLL is embedded in the 64-VFQFN Exposed Pad package. The peak reflow temperature (Cel) amounts to NOT SPECIFIED to be essentially indestructible. 64 terminations can be found in frequency generators. The supply voltage of 1.8V allows for high efficiency. LVCMOS, LVDS, LVPECL, Crystal is designed for clock generator's input. 1 circuits are used to achieve clock PLL's superior flexibility. 350MHz is the maximal value for normal operation. PLL clock is mounted in the way of Surface Mount. The uPs/uCs/Peripheral IC clock generator incoporates is CLOCK GENERATOR, PROCESSOR SPECIFIC. Clock generators should operate with the voltage supply of 1.71V~3.47V. The temperature should be set at -40°C~85°C to ensure reliable performance. CML, HCSL, LVCMOS, LVDS, LVPECL is designed for clock generator's output. ALSO REQUIRES 3.3V SUPPLY can also be founded when using frequency generators.
SI5341D-B-GMR Features
Available in the 64-VFQFN Exposed Pad
Supply voltage of 1.8V

SI5341D-B-GMR Applications
There are a lot of Silicon Labs
SI5341D-B-GMR Clock Generators applications.

Wireless infrastructure
Instrument
Automatic test equipment
Wide area power system
Digital circuits
Wireless base station for LTE, LTE-advanced
Picocells, femtocells and small cells
Sampling clocks for ADC and DAC
1 Gigabit Ethernet
10 Gigabit Ethernet

Factory Lead Time	4 Weeks
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	64-VFQFN Exposed Pad
Operating Temperature	-40°C~85°C
Packaging	Tape & Reel (TR)
Published	2014
Part Status	Not For New Designs
Moisture Sensitivity Level (MSL)	2 (1 Year)
Number of Terminations	64
ECCN Code	EAR99
Additional Feature	ALSO REQUIRES 3.3V SUPPLY
Voltage - Supply	1.71V~3.47V
Terminal Position	QUAD
Terminal Form	NO LEAD
Peak Reflow Temperature (Cel)	NOT SPECIFIED
Supply Voltage	1.8V
Terminal Pitch	0.5mm
Time@Peak Reflow Temperature-Max (s)	NOT SPECIFIED
Output	CML, HCSL, LVCMOS, LVDS, LVPECL
JESD-30 Code	S-XQCC-N64
Number of Circuits	1
uPs/uCs/Peripheral ICs Type	CLOCK GENERATOR, PROCESSOR SPECIFIC
Frequency (Max)	350MHz
Input	LVCMOS, LVDS, LVPECL, Crystal
Ratio - Input:Output	4:10
Primary Clock/Crystal Frequency-Nom	54MHz
PLL	Yes
Differential - Input:Output	Yes/Yes
Divider/Multiplier	Yes/No
Length	9mm
Height Seated (Max)	0.9mm
Width	9mm
RoHS Status	RoHS Compliant