SI5374C-A-GL OverviewClock generator is packaged in the way of Tray. Clock PLL is embedded in the 80-LBGA package. The peak reflow temperature (Cel) amounts to NOT SPECIFIED to be essentially indestructible. 80 terminations can be found in frequency generators. The supply voltage of 1.8V allows for high efficiency. Clock is designed for clock generator's input. 4 circuits are used to achieve clock PLL's superior flexibility. 808MHz is the maximal value for normal operation. PLL clock is mounted in the way of Surface Mount. Clock generators should operate with the voltage supply of 1.71V~2.75V. The temperature should be set at -40°C~85°C to ensure reliable performance. CML, LVCMOS, LVDS, LVPECL is designed for clock generator's output. This electronic component can be classified into Clock Generator, Jitter Attenuator. According to the base part number, its related parts can be founded. Clock generator is designed with 80 pins. The supply voltage should be maintained at 2.5V for high efficiency. This clock generator is a member of DSPLL® series.
SI5374C-A-GL FeaturesAvailable in the 80-LBGA
Supply voltage of 1.8V
Operating supply voltage of 2.5V
SI5374C-A-GL ApplicationsThere are a lot of Silicon Labs
SI5374C-A-GL Clock Generators applications.
Wireless infrastructure
Instrument
Automatic test equipment
Wide area power system
Digital circuits
Wireless base station for LTE, LTE-advanced
Picocells, femtocells and small cells
Sampling clocks for ADC and DAC
1 Gigabit Ethernet
10 Gigabit Ethernet
| Factory Lead Time | 6 Weeks |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 80-LBGA |
| Number of Pins | 80 |
| Operating Temperature | -40°C~85°C |
| Packaging | Tray |
| Series | DSPLL® |
| Published | 2003 |
| JESD-609 Code | e1 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 80 |
| ECCN Code | EAR99 |
| Type | Clock Generator, Jitter Attenuator |
| Terminal Finish | Tin/Silver/Copper (Sn/Ag/Cu) |
| Voltage - Supply | 1.71V~2.75V |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 1.8V |
| Terminal Pitch | 1mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | SI5374 |
| Output | CML, LVCMOS, LVDS, LVPECL |
| Operating Supply Voltage | 2.5V |
| Number of Circuits | 4 |
| Frequency (Max) | 808MHz |
| Input | Clock |
| Ratio - Input:Output | 2:2 |
| Primary Clock/Crystal Frequency-Nom | 710MHz |
| PLL | Yes |
| Differential - Input:Output | Yes/Yes |
| Length | 10mm |
| Height Seated (Max) | 1.56mm |
| Width | 10mm |
| RoHS Status | RoHS Compliant |